| Original document(76 pages) 中文版 |
A display driver circuit includes first to Mth SR blocks which are disposed in a region on the right side of a data input control circuit and hold first to Mth gray-scale data, and (M+1)th to (M+N)th SR blocks which are disposed in a region on the left side of the data input control circuit and hold (M+1)th to (M+N)th gray-scale data. The first to (M+N)th SR blocks hold the first to (M+N)th gray-scale data for which mask control is performed based on a data enable signal shifted by each SR block. The first to Mth gray-scale data is masked in order from first to Mth data mask circuit. The (M+1)th to (M+N)th gray-scale data are unmasked in order from (M+1)th to (M+N)th data mask circuit. |
Application Number
申请号 |
200610056806 |
Application Date
申请日 |
2003.08.27 |
| Title 名称 |
Display driver circuit and display device
|
Publication Number
公开号 |
1835062 |
Publication Date
公开日 |
2006.09.20 |
| Approval Pub. Date |
|
Granted Pub. Date |
|
| International Classification 分类号 |
G09G3/36,G09G3/20,G02F1/133 |
Applicant(s) Name
申请人 |
Seiko Epson Corp. |
| Address 地址 |
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| Inventor(s) Name 发明人 |
Morita Akira |
| Attorney & Agent 代理人 |
zhang shegao li binglin |
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