Original document(26 pages)  中文版
    A hybrid semiconductor structure which includes a horizontal semiconductor device and a vertical carbon nanotube transistor, where the vertical carbon nanotube transistor and the horizontal semiconductor device have at least one shared node is provided. The at least one shared node can include, for example, a drain, source or gate electrode of a FET, or an emitter, collector, or base of a bipolar transistor. A method of forming the inventive hybrid semiconductor structure having at least one shared node between the vertical carbon nanotube transistor and the horizontal semiconductor device is also provided.
Application Number
申请号		 200610002406 Application Date
申请日		 2006.01.27
Title 名称 Hybrid semiconductor structure and its manufacture method
Publication Number
公开号		 1828894 Publication Date
公开日		 2006.09.06
Approval Pub. Date Granted Pub. Date
International Classification 分类号 H01L27/02,H01L21/82
Applicant(s) Name
申请人		 IBM
Address 地址
Inventor(s) Name 发明人 Furukawa Toshiharu, Hakey Mark C., Horak David V., Koburger Charles W. III, Masters Mark E.
Attorney & Agent 代理人 wang yonggang

  
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