Original document(38 pages)  中文版
    A fabrication process for semiconductor device, aimed to retard cracking in the lower surface of a silicon substrate subjected to grinding. A silicon substrate 1 is ground appropriately on the lower surface side. Consequently, fine and acute protrusions and recesses (crystal destruction layer of silicon) are formed on the lower surface of the silicon substrate 1. The lower surface of the silicon substrate 1 is then roughened with level difference of 1-5 [mu]m by wet etching. Subsequently, a protective film 12 is formed of epoxy based resin, or the like, on the lower surface of the silicon substrate 1. Since the lower surface of the silicon substrate 1 is roughened with level difference of 1-5 [mu]m, the rough surface is covered surely with the protective film 12 and cracking is retarded in the lower surface of the silicon substrate.
Application Number
申请号
200610008700 Application Date
申请日
2006.02.21
Title 名称 Semiconductor device and manufacturing method thereof
Publication Number
公开号
1825590 Publication Date
公开日
2006.08.30
Approval Pub. Date Granted Pub. Date
International Classification 分类号 H01L27/04,H01L21/822
Applicant(s) Name
申请人
Casio Computer Co., Ltd.
Address 地址
Inventor(s) Name 发明人 Wakabayashi Takeshi
Attorney & Agent 代理人 hu jianxin

  
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