Original document(11 pages)  中文版
    Belonging to design of very large-scale integrated circuit, the invention prepares capacitor with larger capacitance in unit area under pure digital technique. Two strips of adjacent metal bars or polysilicon bars in same layer are used as two pole plates of capacitor, and interlayer medium is as insulating medium of capacitor. Multiple polysilicon bars or metal bars connected through structure of Insertion fingers are equivalent to multiple capacitors connected in parallel. Through via holes, capacitors formed by metal bars in each layer are connected. Via holes also contributes a part of capacitance so as to increase capacitance in unit area. Considering restriction of designing rule, the invention does not use top layer of metal to implement capacitor. Thus, larger capacitance in unit area is realized under pure digital technique.
Application Number
申请号
200410098991 Application Date
申请日
2004.12.23
Title 名称 Capacitance prepared by using pure digital technique
Publication Number
公开号
1797710 Publication Date
公开日
2006.07.05
Approval Pub. Date Granted Pub. Date
International Classification 分类号 H01L21/02,H01L21/82,H01G4/33,H01G13/00
Applicant(s) Name
申请人
Inst of Microelectronic. C.A.S
Address 地址 100029
Inventor(s) Name 发明人 Guo Huimin
Attorney & Agent 代理人 zhou guocheng

  
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