Original document(16 pages)  中文版
    This invention discloses a negative voltage effective transmission circuit on a standard logic technology including: a clock circuit outputting high level and low level clock signals alternately, a low voltage output channel outputting low voltages, the input of which is connected with said clock circuit output, when the clock signal output by the clock circuit is turned to low level from the high one, the low voltage output channel conduction is triggered to output the low voltage, a negative voltage output channel, the input of which is connected with the output of said clock circuit and the output of which is connected with the output of a zero voltage output channel as the output of the whole circuit, when the clock signal output by the clock circuit is turned to high level from the low, charges stored in a transistor playing the role of a couple condenser triggers the transmission gate conduction of said negative voltage output channel to output negative voltage.
Application Number
申请号
200510132160 Application Date
申请日
2005.12.20
Title 名称 Negative voltage effective transmission circuit of standard logic process
Publication Number
公开号
1794586 Publication Date
公开日
2006.06.28
Approval Pub. Date Granted Pub. Date
International Classification 分类号 H03K19/094,H03K19/096,H03K17/693
Applicant(s) Name
申请人
Beijing Xinji Jiayi, Microelectronic Science & Tech. Co., Ltd.
Address 地址 100084
Inventor(s) Name 发明人
Attorney & Agent 代理人 sun haochen

  
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